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VNP20N07FI VNB20N07/VNV20N07
"OMNIFET": FULLY AUTOPROTECTED POWER MOSFET
TYPE VNP20N07FI VNB20N07 VNV20N07
s s s s s s
V clamp 70 V 70 V 70 V
R DS( on) 0.05 0.05 0.05
I lim 20 A 20 A 20 A
s s
s
LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAWN FROM INPUT PIN DIAGNOSTIC FEEDBACK THROUGH INPUT PIN ESD PROTECTION DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) COMPATIBLE WITH STANDARD POWER MOSFET
ISOWATT220
1 2
3
10
3 1
1
DESCRIPTION The VNP20N07FI, VNB20N07 and VNV20N07 are monolithic devices made using STMicroelectronics VlPower M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limitation and overvoltage clamp protect the chip in harsh BLOCK DIAGRAM ()
D2PAK TO-263
PowerSO-10
enviroments. Fault feedback can be detected by monitoring the voltage at the input pin.
() PowerSO-10 Pin Configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB
June 1998
1/13
VNP20N07FI-VNB20N07-VNV20N07
ABSOLUTE MAXIMUM RATING
Symbol Parameter Po werSO-10 D2PAK V DS V in ID IR V esd P to t Tj Tc T st g Drain-source Voltage (V in = 0) Input Voltage Drain Current Reverse DC O utput Current Electrostatic Discharge (C= 100 pF , R=1.5 K) Total Dissipation at T c = 25 C Operating Junction T emperature Case Operating T emperature Storage Temperature
o
Value ISOW AT T220
Unit
Internally Clamped 18 Internally Limited -28 2000 83 Internally Limited Internally Limited -55 to 150 34
V V A A V W
o o o
C C C
THERMAL DATA
ISOW ATT 220 Pow erSO -10 R t hj-ca se Thermal Resistance Junction-case R t hj-a mb Thermal Resistance Junction-ambient Max Max 3.75 62.5 1.5 50 D2PAK 1.5 62.5
o o
C/W C/W
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symb ol V CLAMP V CL TH V I NCL I DSS I I SS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input-Source Reverse Clamp Voltage Zero Input Voltage Drain Current (V in = 0) Supply Current from Input Pin Test Cond ition s I D = 200 mA I D = 2 mA I in = -1 mA V DS = 13 V V DS = 25 V V DS = 0 V V in = 0 V in = 0 Vin = 10 V 250 V in = 0 V in = 0 Min. 60 55 -1 -0.3 50 200 500 Typ . 70 Max. 80 Un it V V V A A A
ON ()
Symb ol V IN(th) R DS( on) Parameter Input Threshold Voltage Static Drain-source On Resistance V DS = Vin V i n = 10 V Vi n = 5 V Test Cond ition s ID + Ii n = 1 mA I D = 10 A ID = 10 A Min. 0.8 Typ . Max. 3 0.05 0.07 Un it V
DYNAMIC
Symb ol g fs () C oss 2/13 Parameter Forward Transconductance Output Capacitance Test Cond ition s V DS = 13 V V DS = 13 V I D = 10 A f = 1 MHz Vin = 0 Min. 13 Typ . 17 500 800 Max. Un it S pF
VNP20N07FI-VNB20N07-VNV20N07
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ()
Symb ol t d(on) tr t d(of f) tf t d(on) tr t d(of f) tf (di/dt) on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall T ime Turn-on Delay Time Rise Time Turn-off Delay Time Fall T ime Turn-on Current Slope Total Input Charge Test Cond ition s V DD = 15 V V gen = 10 V (see figure 3) V DD = 15 V V gen = 10 V (see figure 3) V DD = 15 V V i n = 10 V V DD = 12 V Id = 10 A R gen = 10 Min. Typ . 90 240 430 150 800 1.5 6 3.5 60 60 Max. 180 400 800 300 1200 2.2 10 5.5 Un it ns ns ns ns ns s s s A/s nC
Id = 10 A R gen = 1000
ID = 10 A R gen = 10 ID = 10 A V i n = 10 V
SOURCE DRAIN DIODE
Symb ol V SD () t r r() Q r r() I RRM () Parameter Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 10 A Test Cond ition s V in = 0 165 0.55 6.5 Min. Typ . Max. 1.6 Un it V ns C A
I SD = 10 A di/dt = 100 A/s V DD = 30 V Tj = 25 oC (see test circuit, figure 5)
PROTECTION
Symb ol I lim t dl im () T j sh() T j rs() I gf () E as() Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy V i n = 10 V Vi n = 5 V starting T j = 25 o C V DD = 20 V V i n = 10 V R gen = 1 K L = 10 mH 0.95 V i n = 10 V Vi n = 5 V V i n = 10 V Vi n = 5 V 150 135 50 20 Test Cond ition s VDS = 13 V V DS = 13 V Min. 14 14 Typ . 20 20 29 70 Max. 28 28 60 140 Un it A A s s
o
C C
o
mA mA J
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % () Parameters guaranteed by design/characterization
3/13
VNP20N07FI-VNB20N07-VNV20N07
PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user's standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates:
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150oC. The device is automatically restarted when the chip temperature falls below 135oC.
- OVERVOLTAGE
CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)).
- LINEAR CURRENT LIMITER CIRCUIT: limits
4/13
VNP20N07FI-VNB20N07-VNV20N07
Thermal Impedance For ISOWATT220 Thermal Impedance For D2PAK / PowerSO-10
Derating Curve
Output Characteristics
Transconductance
Static Drain-Source On Resistance vs Input Voltage
5/13
VNP20N07FI-VNB20N07-VNV20N07
Static Drain-Source On Resistance Static Drain-Source On Resistance
Input Charge vs Input Voltage
Capacitance Variations
Normalized Input Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
6/13
VNP20N07FI-VNB20N07-VNV20N07
Normalized On Resistance vs Temperature Turn-on Current Slope
Turn-on Current Slope
Turn-off Drain-Source Voltage Slope
Turn-off Drain-Source Voltage Slope
Switching Time Resistive Load
7/13
VNP20N07FI-VNB20N07-VNV20N07
Switching Time Resistive Load Switching Time Resistive Load
Current Limit vs Junction Temperature
Step Response Current Limit
Source Drain Diode Forward Characteristics
8/13
VNP20N07FI-VNB20N07-VNV20N07
Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Input Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 6: Waveforms
9/13
VNP20N07FI-VNB20N07-VNV20N07
ISOWATT220 MECHANICAL DATA
DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 O 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.4 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.015 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
A
B
L3 L6 L7 F1 F
D
G1
E
H
F2
123 L2 L4
P011G
10/13
G
VNP20N07FI-VNB20N07-VNV20N07
TO-263 (D2PAK) MECHANICAL DATA
mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.3 2.49 0.7 1.25 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.4 0.6 1.36 9.35 10.28 5.28 15.85 1.4 1.75 MIN. 0.169 0.098 0.027 0.049 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.055 0.023 0.053 0.368 0.404 0.208 0.624 0.055 0.068
DIM.
E C2 L2
A
D L L3
B2 B G
A1 C
P011P6/C
11/13
VNP20N07FI-VNB20N07-VNV20N07
PowerSO-10 MECHANICAL DATA
DIM. MIN. A A1 B c D D1 E E1 E2 E3 E4 e F H h L q 0
o
mm TYP. MAX. 3.65 0.10 0.60 0.55 9.60 7.60 9.50 7.40 7.60 6.35 6.10 1.27 1.25 13.80 0.50 1.20 1.70 8o 1.80 0.047 1.35 14.40 0.049 0.543 MIN. 0.132 0.000 0.016 0.013 0.370 0.291 0.366 0.283 0.283 0.240 0.232 3.35 0.00 0.40 0.35 9.40 7.40 9.30 7.20 7.20 6.10 5.90
inch TYP. MAX. 0.144 0.004 0.024 0.022 0.378 0.300 0.374 0.291 0.300 0.250 0.240 0.050 0.053 0.567 0.002 0.071 0.067
B
0.10 A B
10 = H = A F A1 =
6
=
=
=
E = 1 5 e
0.25
M
=
E2
E3
E1
E4
=
=
A
=
SEATING PLANE DETAIL "A" Q
B
C
h
D = D1 = = = SEATING PLANE
= A1 L
DETAIL "A"
0068039-C
12/13
VNP20N07FI-VNB20N07-VNV20N07
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical compone nts in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. .
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